Efficient and Scalable Cache Coherence for Chip Multiprocessors

Efficient and Scalable Cache Coherence for Chip Multiprocessors

Novel proposals for managing cache coherence in future many-core chip multiprocessors

LAP Lambert Academic Publishing ( 2010-01-26 )

€ 68,00

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Chip multiprocessors (CMPs) constitute the new trend for increasing the performance of future computers. In the near future, chips with tens of cores will become more popular. Nowadays, directory-based protocols constitute the best alternative to keep cache coherence in large-scale systems. Nevertheless, directory-based protocols have two important issues that prevent them from achieving better scalability: the directory memory overhead and the long cache miss latencies. This book focuses on these key issues. The first proposal is a scalable distributed directory organization that copes with the memory overhead of directory-based protocols. The second proposal presents the direct coherence protocols, which are aimed at avoiding the indirection problem of traditional directory-based protocols and, therefore, they improve applications'' performance. Finally, a novel mapping policy for distributed caches is presented. This policy reduces the long access latency while lessening the number of off-chip accesses, leading to improvements in applications'' execution time.

Book Details:

ISBN-13:

978-3-8383-4152-1

ISBN-10:

383834152X

EAN:

9783838341521

Book language:

English

By (author) :

Alberto Ros

Number of pages:

196

Published on:

2010-01-26

Category:

Hardware